The Silicon Brief - 8 August 2026

Today's edition covers AMD's move into hardwired inference silicon, a pair of memory architecture announcements from FMS 2026, TSMC's revised capital spending ceiling, and Intel's latest commitment to its European manufacturing base.

AMD acquires Toronto startup Taalas to etch AI model weights directly into silicon. AMD announced on 6 August 2026 a definitive agreement to acquire Taalas, a Toronto-based startup founded in 2023 that hardwires a single AI model's weights permanently into a chip rather than loading them from memory at runtime. ^[1] The approach eliminates the memory-bandwidth bottleneck that limits GPU inference throughput; Taalas claims its HC1 chip runs Meta's Llama 3.1 8B at roughly 16,960 tokens per second, with the tradeoff that each chip is locked to one model. AMD plans to integrate the technology alongside its Instinct GPUs and Helios rack-scale platform, and the deal is expected to close in Q4 2026 subject to regulatory approval. For chip professionals, this is the clearest signal yet that the inference market is bifurcating between flexible accelerators and purpose-built silicon - AMD is betting it needs both.

Samsung unveiled zHBM at FMS 2026, projecting eight times the performance of HBM5 through full vertical stacking. At the Future of Memory and Storage conference in Santa Clara on 4 August 2026, Samsung presented concept models of zHBM, a next-generation architecture that stacks high-bandwidth memory directly above an AI accelerator rather than beside it, cutting the physical distance data must travel between compute and memory. Samsung claims a future interface system using zHBM could deliver approximately eight times the performance of HBM5, more than ten times the memory density, three times the energy efficiency, and more than 50% lower thermal resistance. The company also introduced its V10 BV-NAND with more than 400 layers, claiming roughly 58% higher density than V9. No commercial timeline was given; these remain concept models, but they set the competitive benchmark for the next HBM generation.

SK Hynix and SanDisk published the first open standard specification for High Bandwidth Flash at FMS 2026. The HBF specification, released through the Open Compute Project on 4 August 2026, defines a new memory tier positioned between HBM and SSDs, supporting capacities up to 512 GB and three bandwidth grades ranging from approximately 0.4 TB/s to 3.0 TB/s. Google and Tenstorrent joined the consortium during the standardization process. HBF uses the UCIe chiplet interconnect to attach to CPUs and GPUs, and is designed specifically to address the capacity-versus-bandwidth tradeoff that constrains large-scale AI inference. Publishing through OCP rather than a proprietary interface is the key move: it invites the broader ecosystem to build around the standard before products ship.

TSMC raised its 2026 capital expenditure ceiling to $64 billion and committed an additional $100 billion to Arizona. On 16 July 2026, TSMC increased its full-year 2026 capex guidance to between $60 billion and $64 billion, up from a prior ceiling of $56 billion, and announced an additional $100 billion investment in Arizona to build multiple 2 nm-and-below wafer fabs and advanced-packaging facilities. The company reported Q2 2026 revenue of $40.2 billion, up 37% year-over-year, and said demand for 3 nm-and-finer chips still exceeds supply by a wide margin. TSMC's total committed US investment now stands at $265 billion. For the supply chain, the message is that advanced-node capacity will remain tight for years, and customers who have not locked in capacity agreements face real risk.

Intel committed €5 billion to expand its Leixlip campus, the only site in Europe running EUV lithography at manufacturing volume. Following its April 2026 repurchase of Apollo Global's 49% stake in Fab 34 for $14.2 billion, Intel announced a €5 billion upgrade of the Irish campus to meet surging demand for Xeon 6 server processors. The investment does not involve new buildings but deepens tooling and capacity at the site, which Intel is also positioning as a potential Intel 18A foundry hub for European automotive and industrial customers. Full ownership of Fab 34 removes the cost-plus-margin drag that had weighed on Intel's gross margins since the 2024 co-investment deal, and the expansion signals that Intel views its European manufacturing base as a long-term competitive asset rather than a liability to be managed.

SIA reported global semiconductor sales of $403.3 billion in Q2 2026, a 35.1% sequential increase. The Semiconductor Industry Association announced on 6 August 2026 that worldwide chip sales reached $403.3 billion in the second quarter of 2026, up 35.1% from Q1 2026. The figure lands against a backdrop of WSTS projections that full-year 2026 sales will reach $1.5 trillion - nearly double the 2025 record of $795.6 billion. AI data center build-out is the primary driver, with a single AI server rack containing more than 4,500 packaged semiconductors and chips accounting for more than 95% of rack value. The quarterly print confirms that the demand surge is not front-loaded; it is running through the year.