Design & EDA
Design & EDATSMC's COUPE co-packaged optics platform enters production in the second half of 2026
TSMC's Compact Universal Photonic Engine moves from qualification to volume production in H2 2026, promising 2x power efficiency and 10x lower latency over pluggable optics.
22 Aug 2026
Design & EDAAgentrys claims its Studio platform lets chip design teams assemble a custom multi-agent flow in 30 minutes
Agentrys says its Studio platform can stand up a custom multi-agent chip design flow in about 30 minutes, with a live demonstration planned for Hot Chips 2026 on 23-25 August.
21 Aug 2026
Design & EDASiemens EDA details Questa One's three-pillar AI update at DAC 2026
Siemens EDA briefed attendees at DAC 2026 on Questa One's latest AI-driven verification updates, covering faster engines, MCP-enabled inter-engine communication, and an Agentic Toolkit with five domain-scoped agents.
21 Aug 2026
Design & EDAQuadric schedules three conference appearances to demonstrate Chimera GPNPU between 23 August and 24 September 2026
Quadric will appear at HotChips, AI Infra Summit, and Embedded World North America between 23 August and 24 September 2026 to demonstrate its Chimera GPNPU processor IP.
20 Aug 2026
Design & EDAESD Alliance schedules a Gen-AI for chip design and security webinar for 10 September 2026
The ESD Alliance's Savage on Security series returns on 10 September 2026, examining how multi-agent LLM systems will automate SoC design and security verification.
20 Aug 2026
Design & EDAApplied Materials argues AI energy efficiency requires co-optimization from chip materials to system architecture
At the OCP APAC Summit on 11-12 August 2026, Applied Materials' Subi Kengeri warned that AI's energy bottleneck cannot be solved at any single layer of the stack.
19 Aug 2026
Design & EDAPDF Solutions redesigns Exensio around LLM agents and scalable analytics in its Aurora architecture
PDF Solutions has unveiled Exensio Aurora, a reimagined platform architecture combining scalable analytics, a semiconductor semantic knowledge graph, and on-premise LLM agents for manufacturing intelligence.
19 Aug 2026
Design & EDARise Design Automation launches IPCreate and IPTransform platforms at DAC 2026, claiming one million gates per engineer per week
Rise Design Automation unveiled IPCreate and IPTransform at DAC 2026, adding an AI-powered spec-to-HLS-to-RTL flow that claims one million gates per engineer per week.
18 Aug 2026
Design & EDAWashington State and UW-Madison propose an LSTM-driven framework that cuts voltage droop EDP by 76x in 2.5D PIM chiplet systems
Researchers from Washington State University and UW-Madison published ReVolt in August 2026, an LSTM-based runtime framework that eliminates voltage droop violations in 2.5D PIM chiplet platforms while cutting energy-delay product by 76x.
18 Aug 2026
Design & EDASemiWiki profiles Jerry Chen, who left Apple and Inphi to build an ultra-low-power edge AI chip startup in Taipei
SemiWiki's CEO interview with Jerry Chen traces his path from IC design at Intel and Apple to founding Upbeat Technology in 2021, where the UP201/UP301 RISC-V MCU and UPM01 MEMS sensor are now shipping.
17 Aug 2026
Design & EDASemiWiki interviews Aras CEO Leon Lauritsen on AI-native PLM and the digital thread
SemiWiki's CEO interview with Leon Lauritsen covers his path to leading Aras, the company's AI-native PLM strategy, and a new semiconductor industry accelerator shown at DAC 2026.
17 Aug 2026
Design & EDATuple Technologies brings a three-product AI infrastructure stack to DAC 2026 booth 1569
Tuple Technologies showed its Stratos, Nitro, and Avestra products at DAC 2026 in Long Beach, targeting IC startups that need cloud EDA infrastructure without a dedicated IT or CAD team.
16 Aug 2026