TSMC's COUPE co-packaged optics platform enters production in the second half of 2026

TSMC confirmed at its 22 April 2026 North America Technology Symposium that its Compact Universal Photonic Engine - TSMC-COUPE - will begin production as a COUPE-on-substrate co-packaged optics solution in the second half of 2026^[1]. The milestone marks the platform's transition from engineering qualification into commercial deployment, and it positions TSMC as the foundry layer underneath the first wave of optical AI switches reaching data centers this year.

What COUPE actually is

COUPE is not a standalone transceiver product. TSMC's strategy is to integrate optical input-output directly with advanced logic rather than sell conventional optical transceivers^[1]. The architecture uses TSMC's SoIC chip-on-wafer bonding to stack an electrical die on top of a photonic die, shortening the electrical path between driver or receiver circuits and the optical devices to the minimum possible distance. The resulting optical engine is then placed beside a host ASIC inside a larger package, eliminating the centimeters of lossy PCB trace that pluggable modules require.

TSMC says the structure supports both grating and edge fiber couplers while avoiding mechanically weak features^[1]. The photonic IC runs on TSMC's 65 nm silicon-photonics process, which is already in volume production as a base layer.

The numbers TSMC is claiming

TSMC's published figures for the on-substrate CPO version, compared with a pluggable module on the circuit board, are:

• 2x improvement in power efficiency
• 10x reduction in latency
• 200 Gbps optical modulation via a micro-ring modulator
• Greater than 99% 3D stacking yield on engineering samples

Broader internal benchmarks cited by TSMC put the power and latency gains higher still - 5-10x power efficiency improvement and 10-20x latency reduction - through the interposer-based integration architecture.

The staged roadmap

TSMC followed a deliberate qualification path before committing to volume. The first implementation targeted small-form-factor pluggable optics, providing a lower-risk environment for process qualification and reliability testing^[1]. The on-substrate CPO version entering production in H2 2026 is the second step. A third generation, integrating COUPE directly into CoWoS packaging alongside the switch ASIC, is planned for 2027 and targets 6.4 Tb/s of optical bandwidth.

NVIDIA and Broadcom are the named early customers. NVIDIA's Quantum-X InfiniBand photonics switches and Spectrum-X Ethernet photonics switches both rely on TSMC's SoIC infrastructure. Broadcom's Tomahawk 6 Davisson - a 102.4 Tb/s-class switch - uses COUPE-based optical engines connected to the switch ASIC through a CoWoS interposer.

Three scaling challenges TSMC has flagged

TSMC's Advanced Packaging Integration Director Shang Hou identified the three hardest problems for CPO at scale:

1. Wafer-level testing of photonic components before packaging
2. Fiber array unit integration with the precision the platform demands
3. High-speed optical packaging assembly at volume yields

Laser supply sits outside TSMC's direct control. Materials and light sources come from Coherent and Sumitomo Electric, and NVIDIA has separately committed $2 billion each to Coherent and Lumentum to secure that supply chain.

TSMC's COUPE chairman C.C. Wei confirmed on the 16 July 2026 earnings call that CPO "has already begun mass production." The next signal to watch is whether CoWoS-integrated CPO - the version that shares interposer real estate with the accelerator die itself - holds to its 2027 target as substrate supply tightens and ABF pricing rises.