Bronco AI schedules a live SoC debug demonstration claiming root-cause analysis in under 15 minutes

Bronco AI has announced a SemiWiki webinar in which it will run its Debug Agent end-to-end on a representative full-chip SoC - from a failing regression to an annotated root cause - in real time^[1]. The company claims the agent delivers root-cause analyses in under 15 minutes, hands-free, at major public chip companies^[1], and presented a 70% end-to-end first-pass debug success rate at DAC 2026 in Long Beach in late July.

The problem the agent targets

As much as 70% of the overall design cycle is now spent on verification, driven upward by increasing design complexity, compressed schedules, and a chronic shortage of DV engineering bandwidth. Design verification consumes up to 70% of total chip project engineering hours. The economics are punishing at the SoC level: a single bug on a full-chip SoC can pull engineers off roadmap work for days or even weeks^[1], involving massive waveforms, thousands of RTL and UVM files, and specifications that are rarely complete^[1]. Modern chips generate thousands of tests per night, producing massive volumes of logs and waveforms, and within that flood engineers must find the rare, chip-killing bug hidden among hundreds of failures - a large-scale data analysis problem repeated daily under intense time pressure.

What the Debug Agent does

Bronco AI pairs state-of-the-art AI agents with a proprietary EDA suite purpose-built for agent-driven chip development, deployed at large public chip companies and startups alike, automating design verification from spec review and verification planning through post-regression debug. The platform has three main agent layers:

• Bronco Planning - reads specs, builds or enriches a verification plan, and checks for coverage holes before they become RTL bugs^[1]
• Bronco Bring-Up - specialized agents for UVM and RTL bring-up at industry scale^[1]
• Bronco Debug - runs from the first regression failure through root cause, across block-level designs and full-chip SoCs^[1]

The proprietary AI-native EDA layer is purpose-built for agents; it is what allows Bronco to navigate SoCs with more than 10,000 files, process massive waveforms, and run parallel debug threads across an entire regression in minutes. A Bronco Knowledge Library captures and indexes every bug, insight, and debug session into a customer-specific knowledge store, so the system improves the longer it runs on a given project^[1].

Architecture and deployment posture

Bronco co-designs the AI models, an AI-native EDA layer, and the product together, rather than bolting an agent onto tools that were never meant for it. Customer design data never leaves the secure environment, Bronco never trains on customer data, and the platform supports bring-your-own-model - whether a third-party enterprise AI or an on-prem self-hosted model - integrating natively with standard EDA flows. For teams with existing AI infrastructure, Bronco also supports bring-your-own-agent deployment: connect existing agents or orchestration harnesses to the Bronco EDA stack and Knowledge Library, and use Bronco as the DV infrastructure layer underneath.

At DAC 2026, co-founder and CTO Jeffrey Z. Pan presented the DVBench benchmark - described by the company as the first long-horizon benchmark for testing agents on real DV tasks at industry SoC scale. Across a diverse set of production issues, the company demonstrated a 70% end-to-end success rate on first-pass debug, arguing that an AI-native EDA toolstack plus advanced layers for planning and institutional knowledge are foundational to achieving that level of reliability. The company's position is that the bottleneck to an AI-native EDA stack is no longer model capability - it is infrastructure, integration, and trust.

The webinar will take questions on deployment, security posture, and integration with existing flows^[1]. Whether the 15-minute claim holds across the range of SoC complexity that attendees bring to the session is the number worth watching.