VIAVI launches a 22 × 42 mm GNSS-disciplined oscillator claiming microsecond-class 24-hour holdover
VIAVI's µPNT GDO-1000 fits in an M.2 B-key footprint, weighs under 4 g, and claims microsecond-class 24-hour holdover using a MEMS oscillator and patented AI/ML algorithms.

VIAVI Solutions announced on 1 June 2026 the µPNT GDO-1000, a GNSS-disciplined oscillator (GNSS-DO) built in the M.2 B-key form factor[1]. The module measures 22 × 42 mm and weighs less than 4 g, yet VIAVI claims it delivers microsecond-class 24-hour holdover - a level of timing resilience previously associated with chip-scale atomic clocks (CSACs) or much larger OCXO-based assemblies.
What the module does
A GNSS-DO pairs a local precision oscillator with a GNSS timing reference and a disciplining algorithm[1]. Under normal conditions the GNSS receiver locks the output - typically 1 PPS and 10 MHz - to the GNSS 1 PPS rising edge[1]. During that phase the system continuously characterises the local oscillator's drift behaviour[1]. If the GNSS signal is jammed, spoofed, or otherwise lost, the module transitions seamlessly to the local oscillator and uses the learned drift model to keep outputs aligned[1].
The GDO-1000 adds several capabilities on top of that baseline:
- Dual-frequency L1/L5 GNSS reception with microsecond-class 24-hour holdover[1]
- M.2 B-key form factor that drops into compute platforms, time appliance cards, and embedded systems without custom mechanical design, drawing approximately half a watt
- MEMS oscillator with better thermal stability across the full military temperature range than traditional quartz OCXOs, with sustained phase noise and Allan Deviation performance under vibration and shock
- Patented AI and ML algorithms - developed by the Jackson Labs team, now part of VIAVI - that predict and compensate for oscillator behaviour across environmental conditions
- External 1 PPS input, allowing disciplining by M-Code GPS or alternative navigation sources without hardware modification
Multiple 1 PPS and low-phase-noise 10 MHz coaxial inputs and outputs are provided for system integration flexibility despite the miniature size.
Why MEMS instead of a CSAC or OCXO
The design choice reflects a market tension that has been building for several years. Demand for compact, low-power precision timing continues to grow, especially as warfighters and unmanned platforms limit payload to stay agile, and customers who designed in CSACs face cost and lead-time pressure.
CSACs are expensive and supply-constrained, while full-size OCXO-based timing solutions are too large and power-hungry for many modern platforms, according to Doug Russell, Senior Vice President and General Manager, Aerospace & Defense at VIAVI. The MEMS approach sits between those two options: it claims CSAC-class holdover duration without the procurement friction, and it fits where an OCXO cannot.
Dual-frequency L1/L5 reception is increasingly specified in defense and critical infrastructure procurements as a baseline requirement, which makes the GDO-1000's integrated L1/L5 support directly relevant to current procurement language.
Target platforms and integration
The GDO-1000 is designed for platforms requiring accurate timing in places where traditional timing modules do not fit or are too power-hungry, including defense and airborne platforms, unmanned systems, data center cards, and communications equipment. The M.2 B-key footprint is a deliberate integration shortcut: the connector is already present on many embedded compute boards, so the module can be evaluated or deployed without a custom carrier.
VIAVI claims the GDO-1000 is the smallest, lowest-power package for precision timing with microsecond-class 24-hour holdover from a MEMS-based oscillator - a claim that has not yet been independently verified by a third-party test body at the time of writing.
The module targets air, land, sea, space, and cyber domains[1]. Whether the 24-hour holdover figure holds across the full military temperature range under simultaneous vibration and thermal stress is the performance question system integrators will want answered before committing to a design. VIAVI has not published a detailed datasheet with corner-case Allan Deviation plots; that disclosure will be the next thing to watch.
Written by Electronics Insider's automated desk from the sources above and published automatically. How we work.
Related
Design & EDASignaloid founder Phillip Stanley-Marbell steps down from Cambridge chair to run probabilistic computing startup full-time
SemiWiki's CEO interview with Phillip Stanley-Marbell traces his path from Bell Labs and Apple to founding Signaloid, a Cambridge spinout whose C0-ASIC targets 1000× performance-per-watt gains.
22 Aug 2026TSMC's COUPE co-packaged optics platform enters production in the second half of 2026
TSMC's Compact Universal Photonic Engine moves from qualification to volume production in H2 2026, promising 2x power efficiency and 10x lower latency over pluggable optics.
22 Aug 2026
SemiconductorsSemiconductor Engineering frames energy efficiency as the defining constraint for AI computing through 2030
Data center electricity is set to nearly double to 945 TWh by 2030, making energy efficiency the central strategic challenge - and opportunity - for every company deploying AI at scale.
22 Aug 2026